Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/display/samsung/samsung,fimd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD) maintainers: - Inki Dae <inki.dae@samsung.com> - Seung-Woo Kim <sw0312.kim@samsung.com> - Kyungmin Park <kyungmin.park@samsung.com> - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: enum: - samsung,s3c2443-fimd - samsung,s3c6400-fimd - samsung,s5pv210-fimd - samsung,exynos3250-fimd - samsung,exynos4210-fimd - samsung,exynos5250-fimd - samsung,exynos5420-fimd '#address-cells': const: 1 clocks: maxItems: 2 clock-names: items: - const: sclk_fimd - const: fimd display-timings: $ref: ../panel/display-timings.yaml# i80-if-timings: type: object additionalProperties: false description: | Timing configuration for lcd i80 interface support. The parameters are defined as:: VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|?? : : : : : Address Output --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX | cs-setup+1 | : : : |<---------->| : : : Chip Select ???????????????|____________:____________:____________|?? | wr-setup+1 | | wr-hold+1 | |<---------->| |<---------->| Write Enable ????????????????????????????|____________|??????????????? | wr-active+1| |<---------->| Video Data ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>-- properties: cs-setup: $ref: /schemas/types.yaml#/definitions/uint32 description: Clock cycles for the active period of address signal is enabled until chip select is enabled. default: 0 wr-active: $ref: /schemas/types.yaml#/definitions/uint32 description: Clock cycles for the active period of CS is enabled. default: 1 wr-hold: $ref: /schemas/types.yaml#/definitions/uint32 description: Clock cycles for the active period of CS is disabled until write signal is disabled. default: 0 wr-setup: $ref: /schemas/types.yaml#/definitions/uint32 description: Clock cycles for the active period of CS signal is enabled until write signal is enabled. default: 0 iommus: minItems: 1 maxItems: 2 iommu-names: items: - const: m0 - const: m1 interrupts: items: - description: FIFO level - description: VSYNC - description: LCD system interrupt-names: items: - const: fifo - const: vsync - const: lcd_sys power-domains: maxItems: 1 reg: maxItems: 1 samsung,invert-vden: type: boolean description: Video enable signal is inverted. samsung,invert-vclk: type: boolean description: Video clock signal is inverted. samsung,sysreg: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to System Register syscon. '#size-cells': const: 0 patternProperties: "^port@[0-4]+$": $ref: /schemas/graph.yaml#/properties/port description: | Contains ports with port with index:: 0 - for CAMIF0 input, 1 - for CAMIF1 input, 2 - for CAMIF2 input, 3 - for parallel output, 4 - for write-back interface required: - compatible - clocks - clock-names - interrupts - interrupt-names - reg allOf: - if: properties: compatible: contains: const: samsung,exynos5420-fimd then: properties: iommus: minItems: 2 maxItems: 2 additionalProperties: false examples: - | #include <dt-bindings/clock/exynos4.h> fimd@11c00000 { compatible = "samsung,exynos4210-fimd"; interrupt-parent = <&combiner>; reg = <0x11c00000 0x20000>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <11 0>, <11 1>, <11 2>; clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; clock-names = "sclk_fimd", "fimd"; power-domains = <&pd_lcd0>; iommus = <&sysmmu_fimd0>; samsung,sysreg = <&sys_reg>; #address-cells = <1>; #size-cells = <0>; samsung,invert-vden; samsung,invert-vclk; pinctrl-0 = <&lcd_clk>, <&lcd_data24>; pinctrl-names = "default"; port@3 { reg = <3>; fimd_dpi_ep: endpoint { remote-endpoint = <&lcd_ep>; }; }; }; |