Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip DFI maintainers: - Sascha Hauer <s.hauer@pengutronix.de> properties: compatible: enum: - rockchip,rk3399-dfi - rockchip,rk3568-dfi - rockchip,rk3588-dfi clocks: maxItems: 1 clock-names: items: - const: pclk_ddr_mon interrupts: minItems: 1 maxItems: 4 reg: maxItems: 1 rockchip,pmu: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the syscon managing the "PMU general register files". required: - compatible - interrupts - reg if: properties: compatible: contains: enum: - rockchip,rk3399-dfi then: required: - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/rk3308-cru.h> bus { #address-cells = <2>; #size-cells = <2>; dfi: dfi@ff630000 { compatible = "rockchip,rk3399-dfi"; reg = <0x00 0xff630000 0x00 0x4000>; interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>; rockchip,pmu = <&pmugrf>; clocks = <&cru PCLK_DDR_MON>; clock-names = "pclk_ddr_mon"; }; }; |