# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/connector/pcie-m2-e-connector.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: PCIe M.2 Mechanical Key E Connector

maintainers:
  - Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

description:
  A PCIe M.2 E connector node represents a physical PCIe M.2 Mechanical Key E
  connector. Mechanical Key E connectors are used to connect Wireless
  Connectivity devices including combinations of Wi-Fi, BT, NFC to the host
  machine over interfaces like PCIe/SDIO, USB/UART+PCM, and I2C.

properties:
  compatible:
    const: pcie-m2-e-connector

  vpcie3v3-supply:
    description: A phandle to the regulator for 3.3v supply.

  vpcie1v8-supply:
    description: A phandle to the regulator for VIO 1.8v supply.

  i2c-parent:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: I2C interface

  clocks:
    description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to
      the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for
      more details.
    maxItems: 1

  w-disable1-gpios:
    description: GPIO output to W_DISABLE1# signal. This signal is used by the
      host system to disable WiFi radio in the M.2 card. Refer, PCI Express M.2
      Specification r4.0, sec 3.1.12.3 for more details.
    maxItems: 1

  w-disable2-gpios:
    description: GPIO output to W_DISABLE2# signal. This signal is used by the
      host system to disable BT radio in the M.2 card. Refer, PCI Express M.2
      Specification r4.0, sec 3.1.12.3 for more details.
    maxItems: 1

  viocfg-gpios:
    description: GPIO input to IO voltage configuration (VIO_CFG) signal. The
      card drives this signal to indicate to the host system whether the card
      supports an independent IO voltage domain for sideband signals. Refer,
      PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details.
    maxItems: 1

  uart-wake-gpios:
    description: GPIO input to UART_WAKE# signal. The card asserts this signal
      to wake the host system and initiate UART interface communication. Refer,
      PCI Express M.2 Specification r4.0, sec 3.1.8.1 for more details.
    maxItems: 1

  sdio-wake-gpios:
    description: GPIO input to SDIO_WAKE# signal. The card asserts this signal
      to wake the host system and initiate SDIO interface communication. Refer,
      PCI Express M.2 Specification r4.0, sec 3.1.7 for more details.
    maxItems: 1

  sdio-reset-gpios:
    description: GPIO output to SDIO_RESET# signal. This signal is used by the
      host system to reset SDIO interface of the M.2 card. Refer, PCI Express
      M.2 Specification r4.0, sec 3.1.7 for more details.
    maxItems: 1

  vendor-porta-gpios:
    description: GPIO for the first vendor specific signal (VENDOR_PORTA). This
      signal's functionality is defined by the card manufacturer and may be
      used for proprietary features. Refer the card vendor's documentation for
      details.
    maxItems: 1

  vendor-portb-gpios:
    description: GPIO for the second vendor specific signal (VENDOR_PORTB). This
      signal's functionality is defined by the card manufacturer and may be
      used for proprietary features. Refer the card vendor's documentation for
      details.
    maxItems: 1

  vendor-portc-gpios:
    description: GPIO for the third vendor specific signal (VENDOR_PORTC). This
      signal's functionality is defined by the card manufacturer and may be
      used for proprietary features. Refer the card vendor's documentation for
      details.
    maxItems: 1

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    description: OF graph bindings modeling the interfaces exposed on the
      connector. Since a single connector can have multiple interfaces, every
      interface has an assigned OF graph port number as described below.

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description: PCIe interface for Wi-Fi

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description: SDIO interface for Wi-Fi

      port@2:
        $ref: /schemas/graph.yaml#/properties/port
        description: USB 2.0 interface for BT

      port@3:
        $ref: /schemas/graph.yaml#/properties/port
        description: UART interface for BT

      port@4:
        $ref: /schemas/graph.yaml#/properties/port
        description: PCM/I2S interface

    anyOf:
      - anyOf:
          - required:
              - port@0
          - required:
              - port@1
      - anyOf:
          - required:
              - port@2
          - required:
              - port@3

required:
  - compatible
  - vpcie3v3-supply

additionalProperties: false

examples:
  # PCI M.2 Key E connector for Wi-Fi/BT with PCIe/UART interfaces
  - |
    #include <dt-bindings/gpio/gpio.h>
 
    connector {
        compatible = "pcie-m2-e-connector";
        vpcie3v3-supply = <&vreg_wcn_3p3>;
        vpcie1v8-supply = <&vreg_l15b_1p8>;
        i2c-parent = <&i2c0>;
        w-disable1-gpios = <&tlmm 115 GPIO_ACTIVE_LOW>;
        w-disable2-gpios = <&tlmm 116 GPIO_ACTIVE_LOW>;
        viocfg-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
        uart-wake-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
        sdio-wake-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
        sdio-reset-gpios = <&tlmm 120 GPIO_ACTIVE_LOW>;
 
        ports {
            #address-cells = <1>;
            #size-cells = <0>;
 
            port@0 {
                reg = <0>;
                #address-cells = <1>;
                #size-cells = <0>;
 
                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&pcie4_port0_ep>;
                };
            };
 
            port@3 {
                reg = <3>;
                #address-cells = <1>;
                #size-cells = <0>;
 
                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&uart14_ep>;
                };
            };
        };
    };