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Documentation / frv / features.txt


Based on kernel version 4.16.1. Page generated on 2018-04-09 11:53 EST.

1				 ===========================
2				 FUJITSU FR-V LINUX FEATURES
3				 ===========================
4	
5	This kernel port has a number of features of which the user should be aware:
6	
7	 (*) Linux and uClinux
8	
9	     The FR-V architecture port supports both normal MMU linux and uClinux out
10	     of the same sources.
11	
12	
13	 (*) CPU support
14	
15	     Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with
16	     the same uClinux kernel configuration.
17	
18	     In normal (MMU) Linux mode, only the FR451 CPU will work as that is the
19	     only one with a suitably featured CPU.
20	
21	     The kernel is written and compiled with the assumption that only the
22	     bottom 32 GR registers and no FR registers will be used by the kernel
23	     itself, however all extra userspace registers will be saved on context
24	     switch. Note that since most CPUs can't support lazy switching, no attempt
25	     is made to do lazy register saving where that would be possible (FR555
26	     only currently).
27	
28	
29	 (*) Board support
30	
31	     The board on which the kernel will run can be configured on the "Processor
32	     type and features" configuration tab.
33	
34	     Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK.
35	
36	     Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60,
37	     CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to
38	     boot with the standard ATA90590B VDK motherboard, and set it to "None" to
39	     boot without any motherboard.
40	
41	
42	 (*) Binary Formats
43	
44	     The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT
45	     and AOUT binaries are not supported for this architecture.
46	
47	     FDPIC ELF supports shared library and program interpreter facilities.
48	
49	
50	 (*) Scheduler Speed
51	
52	     The kernel scheduler runs at 100Hz irrespective of the clock speed on this
53	     architecture. This value is set in asm/param.h (see the HZ macro defined
54	     there).
55	
56	
57	 (*) Normal (MMU) Linux Memory Layout.
58	
59	     See mmu-layout.txt in this directory for a description of the normal linux
60	     memory layout
61	
62	     See include/asm-frv/mem-layout.h for constants pertaining to the memory
63	     layout.
64	
65	     See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
66	     controller configuration.
67	
68	
69	 (*) uClinux Memory Layout
70	
71	     The memory layout used by the uClinux kernel is as follows:
72	
73		0x00000000 - 0x00000FFF		Null pointer catch page
74		0x20000000 - 0x200FFFFF CS2#    [PDK] FPGA
75		0xC0000000 - 0xCFFFFFFF		SDRAM
76		0xC0000000			Base of Linux kernel image
77		0xE0000000 - 0xEFFFFFFF	CS2#	[VDK] SLBUS/PCI window
78		0xF0000000 - 0xF0FFFFFF	CS5#	MB93493 CSC area (DAV daughter board)
79		0xF1000000 - 0xF1FFFFFF	CS7#	[CB70/CB451] CPU-card PCMCIA port space
80		0xFC000000 - 0xFC0FFFFF	CS1#	[VDK] MB86943 config space
81		0xFC100000 - 0xFC1FFFFF	CS6#	[CB70/CB451] CPU-card DM9000 NIC space
82		0xFC100000 - 0xFC1FFFFF	CS6#	[PDK] AX88796 NIC space
83		0xFC200000 - 0xFC2FFFFF	CS3#	MB93493 CSR area (DAV daughter board)
84		0xFD000000 - 0xFDFFFFFF	CS4#	[CB70/CB451] CPU-card extra flash space
85		0xFE000000 - 0xFEFFFFFF		Internal CPU peripherals
86		0xFF000000 - 0xFF1FFFFF	CS0#	Flash 1
87		0xFF200000 - 0xFF3FFFFF	CS0#	Flash 2
88		0xFFC00000 - 0xFFC0001F	CS0#	[VDK] FPGA
89	
90	     The kernel reads the size of the SDRAM from the memory bus controller
91	     registers by default.
92	
93	     The kernel initialisation code (1) adjusts the SDRAM base addresses to
94	     move the SDRAM to desired address, (2) moves the kernel image down to the
95	     bottom of SDRAM, (3) adjusts the bus controller registers to move I/O
96	     windows, and (4) rearranges the protection registers to protect all of
97	     this.
98	
99	     The reasons for doing this are: (1) the page at address 0 should be
100	     inaccessible so that NULL pointer errors can be caught; and (2) the bottom
101	     three quarters are left unoccupied so that an FR-V CPU with an MMU can use
102	     it for virtual userspace mappings.
103	
104	     See include/asm-frv/mem-layout.h for constants pertaining to the memory
105	     layout.
106	
107	     See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
108	     controller configuration.
109	
110	
111	 (*) uClinux Memory Protection
112	
113	     A DAMPR register is used to cover the entire region used for I/O
114	     (0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached
115	     accesses to this region. Userspace is not permitted to access it.
116	
117	     The DAMPR/IAMPR protection registers not in use for any other purpose are
118	     tiled over the top of the SDRAM such that:
119	
120		(1) The core kernel image is covered by as small a tile as possible
121	            granting only the kernel access to the underlying data, whilst
122	            making sure no SDRAM is actually made unavailable by this approach.
123	
124		(2) All other tiles are arranged to permit userspace access to the rest
125	            of the SDRAM.
126	
127	     Barring point (1), there is nothing to protect kernel data against
128	     userspace damage - but this is uClinux.
129	
130	
131	 (*) Exceptions and Fixups
132	
133	     Since the FR40x and FR55x CPUs that do not have full MMUs generate
134	     imprecise data error exceptions, there are currently no automatic fixup
135	     services available in uClinux. This includes misaligned memory access
136	     fixups.
137	
138	     Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and
139	     forcing the fault to happen there.
140	
141	     On the FR451, however, data exceptions are mostly precise, and so
142	     exception fixup handling is implemented as normal.
143	
144	
145	 (*) Userspace Breakpoints
146	
147	     The ptrace() system call supports the following userspace debugging
148	     features:
149	
150		(1) Hardware assisted single step.
151	
152		(2) Breakpoint via the FR-V "BREAK" instruction.
153	
154		(3) Breakpoint via the FR-V "TIRA GR0, #1" instruction.
155	
156		(4) Syscall entry/exit trap.
157	
158	     Each of the above generates a SIGTRAP.
159	
160	
161	 (*) On-Chip Serial Ports
162	
163	     The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note
164	     that if the GDB stub is compiled in, ttyS1 will not actually be available
165	     as it will be being used for the GDB stub.
166	
167	     These ports can be made by:
168	
169		mknod /dev/ttyS0 c 4 64
170		mknod /dev/ttyS1 c 4 65
171	
172	
173	 (*) Maskable Interrupts
174	
175	     Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if
176	     present, and cause a panic if not. If the GDB stub is present, ttyS1's
177	     interrupts are rated at level 15.
178	
179	     All other interrupts are distributed over the set of available priorities
180	     so that no IRQs are shared where possible. The arch interrupt handling
181	     routines attempt to disentangle the various sources available through the
182	     CPU's own multiplexor, and those on off-CPU peripherals.
183	
184	
185	 (*) Accessing PCI Devices
186	
187	     Where PCI is available, care must be taken when dealing with drivers that
188	     access PCI devices. PCI devices present their data in little-endian form,
189	     but the CPU sees it in big-endian form. The macros in asm/io.h try to get
190	     this right, but may not under all circumstances...
191	
192	
193	 (*) Ax88796 Ethernet Driver
194	
195	     The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A
196	     driver has been written to deal specifically with this. The driver
197	     provides MII services for the card.
198	
199	     The driver can be configured by running make xconfig, and going to:
200	
201		(*) Network device support
202		    - turn on "Network device support"
203		    (*) Ethernet (10 or 100Mbit)
204			- turn on "Ethernet (10 or 100Mbit)"
205			- turn on "AX88796 NE2000 compatible chipset"
206	
207	     The driver can be found in:
208	
209		drivers/net/ax88796.c
210		include/asm/ax88796.h
211	
212	
213	 (*) WorkRAM Driver
214	
215	     This driver provides a character device that permits access to the WorkRAM
216	     that can be found on the FR451 CPU. Each page is accessible through a
217	     separate minor number, thereby permitting each page to have its own
218	     filesystem permissions set on the device file.
219	
220	     The device files should be:
221	
222		mknod /dev/frv/workram0 c 240 0
223		mknod /dev/frv/workram1 c 240 1
224		mknod /dev/frv/workram2 c 240 2
225		...
226	
227	     The driver will not permit the opening of any device file that does not
228	     correspond to at least a partial page of WorkRAM. So the first device file
229	     is the only one available on the FR451. If any other CPU is detected, none
230	     of the devices will be openable.
231	
232	     The devices can be accessed with read, write and llseek, and can also be
233	     mmapped. If they're mmapped, they will only map at the appropriate
234	     0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If
235	     MAP_FIXED is not specified, the appropriate address will be chosen anyway.
236	
237	     The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be
238	     PROT_EXEC. They must also start at file offset 0, and must not be longer
239	     than one page in size.
240	
241	     This driver can be configured by running make xconfig, and going to:
242	
243		(*) Character devices
244		    - turn on "Fujitsu FR-V CPU WorkRAM support"
245	
246	
247	 (*) Dynamic data cache write mode changing
248	
249	     It is possible to view and to change the data cache's write mode through
250	     the /proc/sys/frv/cache-mode file while the kernel is running. There are
251	     two modes available:
252	
253		NAME	MEANING
254		=====	==========================================
255		wthru	Data cache is in Write-Through mode
256		wback	Data cache is in Write-Back/Copy-Back mode
257	
258	     To read the cache mode:
259	
260		# cat /proc/sys/frv/cache-mode
261		wthru
262	
263	     To change the cache mode:
264	
265		# echo wback >/proc/sys/frv/cache-mode
266		# cat /proc/sys/frv/cache-mode
267		wback
268	
269	
270	 (*) MMU Context IDs and Pinning
271	
272	     On MMU Linux the CPU supports the concept of a context ID in its MMU to
273	     make it more efficient (TLB entries are labelled with a context ID to link
274	     them to specific tasks).
275	
276	     Normally once a context ID is allocated, it will remain affixed to a task
277	     or CLONE_VM'd group of tasks for as long as it exists. However, since the
278	     kernel is capable of supporting more tasks than there are possible ID
279	     numbers, the kernel will pass context IDs from one task to another if
280	     there are insufficient available.
281	
282	     The context ID currently in use by a task can be viewed in /proc:
283	
284		# grep CXNR /proc/1/status
285		CXNR: 1
286	
287	     Note that kernel threads do not have a userspace context, and so will not
288	     show a CXNR entry in that file.
289	
290	     Under some circumstances, however, it is desirable to pin a context ID on
291	     a process such that the kernel won't pass it on. This can be done by
292	     writing the process ID of the target process to a special file:
293	
294		# echo 17 >/proc/sys/frv/pin-cxnr
295	
296	     Reading from the file will then show the context ID pinned.
297	
298		# cat /proc/sys/frv/pin-cxnr
299		4
300	
301	     The context ID will remain pinned as long as any process is using that
302	     context, i.e.: when the all the subscribing processes have exited or
303	     exec'd; or when an unpinning request happens:
304	
305		# echo 0 >/proc/sys/frv/pin-cxnr
306	
307	     When there isn't a pinned context, the file shows -1:
308	
309		# cat /proc/sys/frv/pin-cxnr
310		-1
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