Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 ACPI I2C Muxes 2 -------------- 3 4 Describing an I2C device hierarchy that includes I2C muxes requires an ACPI 5 Device () scope per mux channel. 6 7 Consider this topology: 8 9 +------+ +------+ 10 | SMB1 |-->| MUX0 |--CH00--> i2c client A (0x50) 11 | | | 0x70 |--CH01--> i2c client B (0x50) 12 +------+ +------+ 13 14 which corresponds to the following ASL: 15 16 Device (SMB1) 17 { 18 Name (_HID, ...) 19 Device (MUX0) 20 { 21 Name (_HID, ...) 22 Name (_CRS, ResourceTemplate () { 23 I2cSerialBus (0x70, ControllerInitiated, I2C_SPEED, 24 AddressingMode7Bit, "^SMB1", 0x00, 25 ResourceConsumer,,) 26 } 27 28 Device (CH00) 29 { 30 Name (_ADR, 0) 31 32 Device (CLIA) 33 { 34 Name (_HID, ...) 35 Name (_CRS, ResourceTemplate () { 36 I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED, 37 AddressingMode7Bit, "^CH00", 0x00, 38 ResourceConsumer,,) 39 } 40 } 41 } 42 43 Device (CH01) 44 { 45 Name (_ADR, 1) 46 47 Device (CLIB) 48 { 49 Name (_HID, ...) 50 Name (_CRS, ResourceTemplate () { 51 I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED, 52 AddressingMode7Bit, "^CH01", 0x00, 53 ResourceConsumer,,) 54 } 55 } 56 } 57 } 58 }